Saturday, April 12, 2008

Racetrack memory

In computer data storage, racetrack memory is an experimental non-volatile memory device under development at IBM's Almaden Research Center by a team led by Stuart Parkin, as well as teams at various other locations.[1] In early 2008 a 3-bit version was successfully demonstrated


IBM's version of racetrack uses spin-coherent electric current to move the magnetic domains along an U-shaped nanoscopic wire. As current is passing through the wire, the domains move over the magnetic read/write heads positioned at the bottom of the U, which alter the domains to record patterns of bits. A memory device is made up of many such wires and read/write elements.

Comparison to flash memory

The theoretical density of racetrack memory is much higher than comparable devices such as Flash RAM, estimates suggesting the maximum areal density is between 10 and 100 times the best possible Flash devices. Flash devices are already built on the latest fabs at 45 nm, and there are problems that suggest scaling down to 30 nm may be a lower fundamental limit. Racetrack is not much smaller, the wires about 5 to 10 nm across, but by arranging them vertically the devices become three dimensional, gaining density.

Additionally, Flash requires large voltage to reset a "cell" in order to be written to. This requires a device known as a charge pump to provide the required voltage, and the pump takes time to build up a charge. This limits the write speeds of Flash to many times slower than reads, up to 1000 times. This limits its usage in many applications. Additionally the action of sending this large voltage into the cells degrades them mechanically, so Flash has a limited lifetime, between 10,000 and 100,000 writes. Flash memory devices use a variety of techniques to avoid writing to the same cell if possible, but they only limit the problem, not eliminate it.

Racetrack has neither of these problems. Reading and writing is fairly symmetrical and is limited primarily by the time it takes for the magnetic pattern to be moved across the read/write heads.

Development difficulties

One limitation of the early experimental devices was that the magnetic domains could only be pushed slowly through the wires, requiring current pulses on the orders of microseconds to move them successfully. This was unexpected, and led to performance roughly equal to hard drives, as much as 1000 times slower than predicted. Recent research at the University of Hamburg has traced this problem to microscopic imperfections in the crystal structure of the wires which led to the domains becoming "stuck" at these imperfections. Using an x-ray microscope to directly image the boundaries between the domains, their research found that domain walls would be moved by pulses as short as a few nanoseconds when these imperfections were absent. This corresponds to a macroscopic speed of about 110 m/s.

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